1. Field of the Invention
The present invention relates in general to digital to analog converter (DAC) amplifier systems, and in particular to the operation of a delta-sigma DACs at multiple ratios of the input data rate to the oversampling rate.
2. Description of the Related Art
Class D audio power amplifiers (APAs) have been used for many years in systems, such as wireline telephony, where high bandwidth is not critical. More recently however, new fabrication techniques, and in particular, new techniques for fabricating power transistors, have made integrated class D APAs possible. This has extended their potential applications to lower-power, higher-bandwidth systems, including battery-powered portable music players and wireless communications devices.
One major advantage of class D amplifiers is their efficiency. Generally, an audio signal is converted into a relatively high frequency stream of pulses varying in width with the amplitude of the audio signal. This pulse width modulated (PWM) signal is used to switch a set of power output transistors between cutoff and saturation which results in efficiencies above ninety percent (90%). In contrast, the typical class AB push-pull amplifier, using output transistors whose conduction varies linearly during each half-cycle, has an efficiency of around sixty percent (60%). The increased efficiency of class D amplifiers in turn reduces power consumption and consequently lowers heat dissipation and improves battery life in portable systems.
As previously described, in a class D amplifier, efficiency is gained by switching the power devices hard between the power supply rails. The high frequency noise is then filtered with a low pass filter. Typically, the low pass filter is of the passive type, including inductive and/or capacitive reactive elements to smooth the signal. FIG. 1 illustrates, in block diagram form, a typical class D amplifier system 100. Amplifier system 100 includes class D amplifier 102 containing MOSFET switch 104 and delta-sigma (xcex94xcexa3) converter/PWM controller 106 receives a digital input signal, which constitutes the signal to be amplified. Typically, the digital signal may be a digitized audio signal, and the amplified output signal, after conversion to an analog signal as discussed below, provided to an audio transducer, such as a speaker or headphone for presentation to a human listener. However, other signals with a similar bandwidth may be the source of the digital signal, for example, a control signal in a digital feedback loop applied to an analog controller, and the inventive principles to be described may be used with such systems as well. The digital input signal may be high resolution, low data rate data, which may be converted to low resolution, high data rate data by delta-sigma converter portion of delta-sigma converter/PWM 106. (For example, the digital input signal may be twenty-four bit data at a 44 kHz rate, while the PWM output may be five bit, 1.1 MHz data.) MOSFET switch 104 may constitute a fill bridge amplifier. The duty cycle of the PWM signal is proportional to the (quantized) amplitude of the information signal. In other words, for each sample period, the relative time duration of the xe2x80x9chighxe2x80x9d and xe2x80x9clowxe2x80x9d levels of the PWM signal into MOSFET switch 106 are proportional to the quantized amplitude of the information signal, and consequently the relative time intervals during which the output of the amplifier, ahead of LPF 110, is pulled up and pulled down is similarly proportional to the audio signal amplitude. (PWM signal generation techniques are discussed in the commonly owned U.S. Pat. No. 5,815,102 to Melanson, entitled xe2x80x9cDelta-sigma PWM DAC to Reduce Switching,xe2x80x9d incorporated herein by reference.) The amplified information is recovered via low pass filter (LPF) 110, which provides the analog output to a load, Z.
As discussed above, the digital information input may be xe2x80x9chighxe2x80x9d resolution, low rate data while the PWM and switch operate at a high data rate with xe2x80x9clowxe2x80x9d resolution data. The sampling rate of the high data rate signal may be determined by a clock with frequency fh. The low data rate may be determined the sample frequency of the digital information with frequency fs. This may be further appreciated by referring to FIG. 2.1, illustrating, in a high level block diagram, a digital audio system 200 in accordance with the prior art. A digital audio source 202 provides digital audio signal 204 to a delta-sigma converter/PWM/DAC 206 via serial port 205. (Serial port 205 receives digital audio signal 204 in a serial format and converts it to a parallel format used by the subsequent circuitry.) An analog audio output appears at the output of delta-sigma converter/PWM/DAC 206. Typically, the ratio of the frequencies, k=fh/fs, may be a predetermined value, for example, 64, 128, 256 etc. Thus, the sample rate of the digital information signal determines the frequency fh. For a digital audio signal derived from a low frequency audio source, a voiceband signal, for example, the sample rate, fs may be concomitantly low, in accordance with the Nyquist sampling theorem. As a consequence, the output of the amplifier system may contain a significant noise component arising from the quantization noise spectrum, a portion of which is xe2x80x9cin-bandxe2x80x9d with the PWM operating at the corresponding frequency, fh. This may be further appreciated by referring to FIG. 2.2 qualitatively illustrating a frequency spectrum of the audio output for a system such as system 200, FIG. 2.1. The output includes a voiceband signal 220 (shown centered near 3.3 kHz, at the upper end of the voiceband range). A typical sampling frequency of the digital audio signal, fs, of 8 kHz is shown. Quantization noise spectrum 222 exhibits a significant noise power in the audible range below 20 kHz. Thus, there is a need in the art for systems and methods to reduce in-band noise in PWM systems operated with xe2x80x9clowxe2x80x9d frequency input signals.
According to the principles of the present invention, multirate digital-to-analog amplifier system is disclosed. The system includes a digital signal source. A programmable interpolator is configured to interpolate digital values between samples of a digital signal from the digital signal source. The digital signal has a first sample rate and an output of the interpolator has a second, predetermined sample rate which is independent of the first sample rate. The system also includes an amplifier configured to amplify a digital signal having the second sample rate in response to the output signal of the interpolator.
The inventive concept addresses a problem in DAC amplifier systems namely, in-band noise in DAC amplifiers when amplifying signals with spectra limited to the low end of the audio range, for example, voiceband signals, or similar. Conventional DAC amplifier systems have a fixed ratio of the PWM/DAC sampling frequency to sampling frequency of the signal to be amplified. At typical values of the ratio, the quantization noise in the DAC amplifier system within the bandwidth of the analog output is significant. The interpolator interpolates data values between the samples, at the first sample rate, of the digital signal to be amplified, and the output of the interpolator at the second data rate. The second data rate is a predetermined data rate independent of the first sample rate. The amplifier amplifies a signal at the second data rate in response to the interpolator output, whereby the in-band portion of the analog output noise spectrum is unobjectionable.